IET Computers and Digital Techniques
期刊信息导读
- IET Computers and Digital Techniques基本信息
- IET Computers and Digital Techniques中科院SCI期刊分区
- 历年IET Computers and Digital Techniques影响因子趋势图
- IET Computers and Digital Techniques期刊英文简介
- IET Computers and Digital Techniques期刊中文简介
IET Computers and Digital Techniques基本信息
简称:IET COMPUT DIGIT TEC
中文名称:IET计算机和数字技术
SCI类别:SCIE
是否OA开放访问:No
出版地:ENGLAND
出版周期:Bimonthly
涉及的研究方向:工程技术-计算机:硬件
通讯方式:INST ENGINEERING TECHNOLOGY-IET, MICHAEL FARADAY HOUSE SIX HILLS WAY STEVENAGE, HERTFORD, ENGLAND, SG1 2AY
官方网站:http://www.ietdl.org/IET-CDT
投稿网址:http://mc.manuscriptcentral.com/iet-cdt
审稿速度:>12周,或约稿
平均录用比例:容易
PMC链接:http://www.ncbi.nlm.nih.gov/nlmcatalog?term=1751-8601%5BISSN%5D
IET Computers and Digital Techniques期刊英文简介
IET Computers and Digital Techniques publishes technical papers describing recent research and development work in all aspects of digital system-on-chip design and test of electronic and embedded systems, including the development of design automation tools (methodologies, algorithms and architectures). Papers based on the problems associated with the scaling down of CMOS technology are particularly welcome. It is aimed at researchers, engineers and educators in the fields of computer and digital systems design and test.The key subject areas of interest are:Design Methods and Tools: CAD/EDA tools, hardware description languages, high-level and architectural synthesis, hardware/software co-design, platform-based design, 3D stacking and circuit design, system on-chip architectures and IP cores, embedded systems, logic synthesis, low-power design and power optimisation.Simulation, Test and Validation: electrical and timing simulation, simulation based verification, hardware/software co-simulation and validation, mixed-domain technology modelling and simulation, post-silicon validation, power analysis and estimation, interconnect modelling and signal integrity analysis, hardware trust and security, design-for-testability, embedded core testing, system-on-chip testing, on-line testing, automatic test generation and delay testing, low-power testing, reliability, fault modelling and fault tolerance.Processor and System Architectures: many-core systems, general-purpose and application specific processors, computational arithmetic for DSP applications, arithmetic and logic units, cache memories, memory management, co-processors and accelerators, systems and networks on chip, embedded cores, platforms, multiprocessors, distributed systems, communication protocols and low-power issues.Configurable Computing: embedded cores, FPGAs, rapid prototyping, adaptive computing, evolvable and statically and dynamically reconfigurable and reprogrammable systems, reconfigurable hardware.Design for variability, power and aging: design methods for variability, power and aging aware design, memories, FPGAs, IP components, 3D stacking, energy harvesting.Case Studies: emerging applications, applications in industrial designs, and design frameworks.
IET Computers and Digital Techniques期刊中文简介
IET计算机和数字技术出版技术论文,描述了电子和嵌入式系统芯片上数字系统设计和测试各个方面的最新研究和开发工作,包括设计自动化工具(方法、算法和体系结构)的开发。基于缩小CMOS技术相关问题的论文尤其受欢迎。它面向计算机和数字系统设计和测试领域的研究人员、工程师和教育工作者。重点关注的主题领域有:设计方法和工具:CAD/EDA工具、硬件描述语言、高级和体系结构综合、硬件/软件协同设计、基于平台的设计、3D堆叠和电路设计、系统芯片架构和IP核心、嵌入式系统、逻辑综合、低功耗设计和功率优化。仿真、测试和验证:电气和定时仿真、基于仿真的验证、硬件/软件协同仿真和验证、混合域技术建模和仿真、硅后验证、功率分析和估计、互连建模和信号完整性分析、硬件信任和安全、可测试性设计、嵌入式核心测试、系统芯片测试、在线测试、自动测试生成和延迟测试、低功率测试、可靠性、故障建模和容错。处理器和系统架构:许多核心系统、通用和特定于应用程序的处理器、DSP应用程序的计算算法、算术和逻辑单元、缓存存储器、内存管理、协处理器和加速器、芯片上的系统和网络、嵌入式核心、平台、多处理器、分布式系统、通信协议和低功耗问题。可配置计算:嵌入式核心、FPGA、快速原型、自适应计算、可演化和静态、动态可重构和可重编程系统、可重构硬件。变率、功率和老化设计:变率、功率和老化感知设计、存储器、FPGA、IP组件、3D叠加、能量采集的设计方法。案例研究:新兴应用、工业设计应用和设计框架。
中科院SCI期刊分区:
IET Computers and Digital Techniques影响因子